A PSpice Tutorial for Demonstrating Digital Logic
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| Audience/Grade: | College Freshman-College Sophomore |
| Discipline(s): |
Computer Engineering Electrical Engineering Engineering Education Research |
| Special Topic(s): | |
| Learning Resource Type: |
Teaching - Tutorial |
| Media Type: |
Audio |
| Author(s): |
Michael G. Giesselmann |
| Description: | Abstract - Several new features of the Evaluation version of PSpice are used to generate demonstration examples for teaching digital logic. An important innovation is the ability to display logic levels on the Schematics page for combinatorial logic circuits. Some of the other main features that are being explored in the examples are hierarchical structures and busses. The paper contains many actual screen views. All circuit files that are discussed in the paper, are included on the CD-ROM. |
| Rating: |
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| Related Resources | |
| Keywords: | PSpice Tutorial Digital Logic |
| Usage Tip | |
| Intervention(s): |
Tutorial Tutorial |
| Use of Resource: |
Conclusions: This paper has shown, how some of the new features of the Evaluation version of PSpice can be used to simulate digital circuits. One of the salient new features is the Bias point display on the Schematics page, which greatly enhances the treatment of combinatorial Logic. This feature is specifically appreciated by students in a first course on Digital Logic. In the past the students have often been confused about the necessity to perform transient analyses to obtain simulation results of combinatorial circuits. Some of the other main features that are being explored in the examples are hierarchical structures and busses. |
| Difficulty: |
Very easy |
| Interactivity Level: |
Low |
| Version Info | |
| Publication Date: | November 1999 |
| Platform/Format: |
WWW |
| Cost: |
Free |
| Download URL: | http://ewh.ieee.org/soc/es/Nov1999/02/BEGIN.HTM |
| Metadata: |
IEEE LOM Record |
| Collection: |
NEEDS
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